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Kelly LarsonDesign Verification Engineering Manager, MediaTek Functional verification expert with over 16 years of verification experience. Background in assertions and formal verification techniques. Experience with high level testbench languages and class libraries. Verified microprocessors, DSP's, ASIC's and SoC's. Focus on constrained random testing and coverage models. Specialties: Assertion-Based Verification PSL SVA SystemVerilog High-level Testbench Languages Formal Verification Power Domain Aware Verification SystemVerilog Class Libraries |
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