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Troy Harnisch

Graduate Student, California State University

I am currently working on an MBA program through California State University. I will be seeking an employment opportunity that can utilize my recent MBA activities and my significant work experience. I have over 25 years of management, manufacturing and engineering experience. I most recently served as Vice President of Applications for NanoNexus managing all post-production activities prior to product shipment and with customers using the finished product. Prior to NanoNexus, I served as the Chief Technology Officer for ELES Semiconductor Equipment in Italy where I was directing the development activities of an evolving contact technology. Previously, I worked at NanoNexus as a Senior Applications Engineer working closely with Memory Customers to provide probe card solutions to existing sort floor operations. I was also involved with product development activities and Assembly & Test operations at NanoNexus. Prior to NanoNexus, I worked as an Applications Engineer for FormFactor in the Memory Applications Group. I primarily worked with the probe card products and provided support to customer accounts in Asia, but worked with many FormFactor Customers worldwide. Prior to entering the probe card business, I worked for Texas Instruments where I had many duties and responsibilities encompassing the entire Wafer Test Operations. I started as a Test Equipment Engineer maintaining all the test equipment required for wafer sort operations including probe cards. I quickly acquired the responsibilities for Test Engineering including test program development, memory repair applications and manufacturing efficiency projects. I worked in conjunction with the Failure Analysis Laboratory to correlate electrical defects to physical defects in order to drive process improvements. I also worked in the Product Development Group transferring new devices and processes from development stages into full manufacturing production. I directed cross-functional teams to address and resolve high priority wafer fabrication issues.

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