Goran Grbic 11 connections

Custom hardware designs, mostly based on embedded uP design, including applications such as Home Plug, Ethernet, wireless including Blue-Tooth and 802.11b, ZigBee, 32-bit CPU design (ARM, Freescale MPC5200), 16-bit microcontroller (TI MSP430), RF, analog, audio, LCD display, DDR2 and DDR3 SDRAM and complex low power switching supplies.
Design included Statement of Work, Design documents, Bills of Materials, Schematics, Layout Constraints Definition (for up to 18 layer PCBs), EMI considerations, definition and evaluation of industrial and mechanical designs.
Extensive hands-on use of lab equipment

Designed high-speed silicon verification board and reference printed circuit boards for DDR2 SDRAM Memory Controller (up to 800 Mbits/s). Design included Schematics, Layout Constraints Definition (for up to 18 layer PCBs), Bills of Materials, FPGA design and test software development and extensive hands-on usage of lab equipment.

Research and investigation of new technologies and components
Technical lead and resource for junior staff; interfaced with vendors and customers.
Designed “proof of concept” demo for 802.11b wireless Location Sensor, using line of evaluation boards to provide hardware platform for algorithm based on snooping on 802.11b wireless signal.
Designed and tested 802.11b wireless Location Sensor. Design included RF 802.11b chipset, 8-channel 12-bit high speed ADC, 8-bit DAC, Spartan III FPGA, ColdFire 32-bit MCF5475 FreeScale microcontroller, AMI201 Magnetic Sensor and 802.11b WLAN mini-PCI card.
Used MatLab & Simulink, System Generator and Xilinx ISE tools for FPGA design.
Extensive hands-on use of lab equipment

Designed high-speed silicon verification boards and reference printed circuit boards for Ethernet ASIC switcher/router chip (Fabric – with 24 10/100 ports and 3 1G ports), and Content Addressable Memory (CAM) chip verification and testing. Reference boards included Intel Network Processor Unit and Motorola PowerPC 32-bit microprocessor.
Cross-functional experience with hardware, software and manufacturing.
Prepared data sheets, application notes and customer support documentation.
Programmed FPGAs (Altera APEX II, Xilinx Virtex II) and defined wide spectrum of programmable and digital logic devices, including Lattice CPLDs.
Dealt with HS-clock distribution and timing, and PCI, LA1 and GSYNC bus standards.
Used OrCAD (schematic capture and FPGA entry), Protel (PCB layout), HyperLynx (PCB simulation), Timing Designer, Altera Quartus, Xilinx ISE, ModelSim, Sinplify.
Extensive hands-on use of lab equipment (e.g. 120-channel Tektronix Logic Analyzer).

Project Leader 1998 – 2000

System design, implementation and technical responsibility for contract with the US Coast Guard.
System included Remotely Controlled Stabilization Platform for Imaging Systems, Video Distribution Network, Tactical Airborne Workstation, large variety of communication (image, data and voice transfer) and encryption protocols (ANDVT, KG-84, KY-58), interface protocols (RS232, RS485, ARINC 429, 1553), and data gathering from GPS, Inertial Navigation Unit and Radar, and large variety of power distribution subsystems.
Responsibilities also included project management from project initiation to completion, maintaining relationships with vendors and liaison with the customers, field testing and integration.

Design Engineer 1994 - 1998

Designed Remotely Controlled Stabilized Platforms for Imaging Systems, including interfaces with different video sensors (day light, low light, infra red).
Digital microprocessor design (Intel 960), analog design, serial interfaces (RS232, RS485, Cypress Hot Link), CPLD programming (Lattice), design tools (OrCAD Capture and Layout, ACAD).
Used National Instruments LabView data acquisition software for system testing in temperature chamber and shaker tables.

Project Leader 1987 - 1994

Responsible for internal design team of ten engineers and for project which included six different companies on Radar Surveillance System design.
Designed, built and tested system prototypes for defense and commercial applications that included signal processing for Radar Surveillance System in 1 to 8 GHz range, Moving Target Indicator, Clutter Map, Laser Range Finder in close IC range, Infra-red camera supporting system, Command, Control and Test computer systems.

Senior Design Engineer 1984 - 1987

Design employed INTEL 80186 microprocessor and Lattice CPLD programming.
Designed digital and analog Circuit Card Assemblies.
Developed software in C and Basic.
Calibrated RF test equipment in 1 to 18 GHz range.

Designed and tested encryption systems based on RCA1802 (COSMAC) 8-bit CPU.